1. Field of the Invention
The present invention relates to a non-volatile memory device. More particularly, the present invention relates to a non-volatile memory device having a charge storage oxide layer and operation thereof.
2. Description of Related Art
In contrast to a volatile memory device, a non-volatile memory device retains data stored in its memory cells even with supplied power turned off. A volatile memory device, e.g., a dynamic random access memory (DRAM), needs a refresh operation to retain data, resulting in high power consumption. In contrast, a non-volatile memory device, e.g., a flash memory/electrical erasable programmable read only memory (EEPROM), has a large capacity, low power consumption, and typically used for a file system, a memory card, a portable appliance, etc.
Generally, non-volatile memory devices are classified into a floating gate type memory device and a floating trap type memory device, depending on the material of a charge storage layer. The floating trap type memory device uses a silicon nitride layer as a charge storage layer, and is classified into a silicon/oxide/nitride/oxide/silicon (SONOS) memory device and a metal/oxide/nitride/oxide/silicon (MONOS) memory device, depending on the material of a gate electrode. Further, depending on its structure, non-volatile memory devices may be classified into a stack gate type, a split gate type, a notched gate type, a nano dot type, etc.
Since the floating gate type memory device uses a conductive floating gate as a charge storage layer, if a defect occurs on a part of a tunnel oxide layer separating the floating gate and a semiconductor substrate, all charges stored in the floating gate may be lost. In order to prevent this loss, and to improve reliability, the floating gate type memory device requires a tunnel oxide layer which is thick relative to that of the floating trap type memory device. As the thickness of the tunnel oxide layer is increased, a high operation voltage is needed, thus requiring complicated peripheral circuits. Thus, use of floating gate type memory devices limits integration of a semiconductor device, and has problems caused by high power consumption.
In the floating trap type memory device, since charges are stored in a deep level trap, a tunnel oxide layer that is thin relative to that of the floating gate type memory device may be used, allowing use of a low operation voltage. However, the floating trap type memory device needs a tunnel oxide layer and a blocking oxide layer to encompass a silicon nitride layer used as a charge storage layer, in order to inject and store charges. To achieve high integration of a semiconductor memory device, a simplified memory cell structure is needed. In the conventional floating trap type memory device, an oxide layer may replace a silicon nitride layer as a charge storage layer, allowing the tunnel oxide layer and the blocking oxide layer to be omitted. This replacement has thus been of interest.
However, even when non-volatile memory devices employ the oxide layer as the charge storage layer, much work is still needed to improve general characteristics of the memory device, e.g., program and erase efficiencies.